86 lines
2.2 KiB
C
86 lines
2.2 KiB
C
|
|
||
|
|
#include "stm32g0xx_hal_msp.h"
|
||
|
|
|
||
|
|
void HAL_MspInit(void)
|
||
|
|
{
|
||
|
|
/* USER CODE BEGIN MspInit 0 */
|
||
|
|
|
||
|
|
/* USER CODE END MspInit 0 */
|
||
|
|
|
||
|
|
__HAL_RCC_SYSCFG_CLK_ENABLE();
|
||
|
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||
|
|
|
||
|
|
/* System interrupt init*/
|
||
|
|
|
||
|
|
HAL_SYSCFG_EnableRemap(SYSCFG_REMAP_PA11);
|
||
|
|
HAL_SYSCFG_EnableRemap(SYSCFG_REMAP_PA12);
|
||
|
|
|
||
|
|
/* USER CODE BEGIN MspInit 1 */
|
||
|
|
|
||
|
|
/* USER CODE END MspInit 1 */
|
||
|
|
}
|
||
|
|
|
||
|
|
void SysTick_Handler(void)
|
||
|
|
{
|
||
|
|
HAL_IncTick();
|
||
|
|
}
|
||
|
|
|
||
|
|
void Error_Handler(void)
|
||
|
|
{
|
||
|
|
/* USER CODE BEGIN Error_Handler_Debug */
|
||
|
|
/* User can add his own implementation to report the HAL error return state */
|
||
|
|
__disable_irq();
|
||
|
|
while (1)
|
||
|
|
{
|
||
|
|
}
|
||
|
|
/* USER CODE END Error_Handler_Debug */
|
||
|
|
}
|
||
|
|
|
||
|
|
void SystemClock_Config(void)
|
||
|
|
{
|
||
|
|
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||
|
|
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||
|
|
|
||
|
|
/** Configure the main internal regulator output voltage
|
||
|
|
*/
|
||
|
|
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||
|
|
|
||
|
|
/** Configure LSE Drive Capability
|
||
|
|
*/
|
||
|
|
HAL_PWR_EnableBkUpAccess();
|
||
|
|
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
|
||
|
|
|
||
|
|
/** Initializes the RCC Oscillators according to the specified parameters
|
||
|
|
* in the RCC_OscInitTypeDef structure.
|
||
|
|
*/
|
||
|
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE;
|
||
|
|
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
|
||
|
|
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||
|
|
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
|
||
|
|
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||
|
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||
|
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||
|
|
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
|
||
|
|
RCC_OscInitStruct.PLL.PLLN = 8;
|
||
|
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||
|
|
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
|
||
|
|
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||
|
|
{
|
||
|
|
Error_Handler();
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Initializes the CPU, AHB and APB buses clocks
|
||
|
|
*/
|
||
|
|
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||
|
|
|RCC_CLOCKTYPE_PCLK1;
|
||
|
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||
|
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||
|
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
|
||
|
|
|
||
|
|
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
|
||
|
|
{
|
||
|
|
Error_Handler();
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|