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fix hal requirements

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This commit is contained in:
Ajit Ananthadevan 2025-08-23 11:49:01 +10:00
parent fba966056a
commit c57e17a5ac
5 changed files with 106 additions and 5 deletions
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5
myapps/first-hal/Makefile
View file

@ -2,7 +2,8 @@
# target # target
###################################### ######################################
TARGET = stm32g0_blinky TARGET = stm32g0_blinky
PART = STM32G030xx # check for pyocd PART = STM32G030xx
PYOCD_TARGET = stm32g030f6px
###################################### ######################################
@ -133,7 +134,7 @@ $(BUILD_DIR):
####################################### #######################################
flash: $(BUILD_DIR)/$(TARGET).bin flash: $(BUILD_DIR)/$(TARGET).bin
pyocd load --target $(PART) $(BUILD_DIR)/$(TARGET).bin pyocd load --target $(PYOCD_TARGET) $(BUILD_DIR)/$(TARGET).bin
####################################### #######################################
# clean up # clean up

3
myapps/first-hal/hal.mk
View file

@ -14,5 +14,6 @@ C_SOURCES += \
$(VND_DIR)/STM32CubeG0/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c \ $(VND_DIR)/STM32CubeG0/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_dma_ex.c \
$(VND_DIR)/STM32CubeG0/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c \ $(VND_DIR)/STM32CubeG0/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash.c \
$(VND_DIR)/STM32CubeG0/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c \ $(VND_DIR)/STM32CubeG0/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_flash_ex.c \
$(VND_DIR)/STM32CubeG0/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c $(VND_DIR)/STM32CubeG0/Drivers/STM32G0xx_HAL_Driver/Src/stm32g0xx_hal_gpio.c \
src/stm32g0xx_hal_msp.c

12
myapps/first-hal/src/inc/stm32g0xx_hal_msp.h Normal file
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@ -0,0 +1,12 @@
#include "stm32g0xx_hal.h"
void SystemClock_Config(void);
/*
* Other functions (already defined weak in HAL):
* HAL_MspInit(void)
* void SysTick_Handler(void)
*/

6
myapps/first-hal/src/main.c
View file

@ -1,11 +1,13 @@
//#include <stdint.h>
#include "stm32g0xx_hal.h" //#include "stm32g0xx_hal.h"
#include "stm32g0xx_hal_msp.h"
#define LED_PIN 4 #define LED_PIN 4
int main(void) int main(void)
{ {
HAL_Init(); HAL_Init();
SystemClock_Config();
__HAL_RCC_GPIOA_CLK_ENABLE(); __HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitTypeDef GPIO_InitStruct; GPIO_InitTypeDef GPIO_InitStruct;

85
myapps/first-hal/src/stm32g0xx_hal_msp.c Normal file
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@ -0,0 +1,85 @@
#include "stm32g0xx_hal_msp.h"
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_SYSCFG_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
HAL_SYSCFG_EnableRemap(SYSCFG_REMAP_PA11);
HAL_SYSCFG_EnableRemap(SYSCFG_REMAP_PA12);
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
void SysTick_Handler(void)
{
HAL_IncTick();
}
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Configure the main internal regulator output voltage
*/
HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
/** Configure LSE Drive Capability
*/
HAL_PWR_EnableBkUpAccess();
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
RCC_OscInitStruct.PLL.PLLN = 8;
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{
Error_Handler();
}
}